A Graph-theoretic Suucient Condition for Fpga/fpic Switch-module Routability

نویسندگان

  • Yao-Wen Chang
  • D. F. Wong
چکیده

Switch-Module Routability Yao-Wen Chang1, D. F. Wong2, and C. K. Wong3y 1Department of Computer and Information Science, National Chiao Tung University, Hsinchu, Taiwan, ROC 2Department of Computer Sciences, University of Texas at Austin, Austin, Texas 78712, USA 3Department of Computer Science, Chinese University of Hong Kong, Hong Kong Abstract Switch modules are the most important component of the routing resources in FPGA's/FPIC's. We consider in this paper an FPGA/FPIC switch-module analysis problem: The inputs consist of a switch-module description and the number of nets required to be routed through the switch module; the question is to determine if there exists a feasible routing for the routing requirements on the switch module. This problem is applicable to the routability evaluation of FPGA/FPIC switch modules, the switch-module design for FPGA's/FPIC's, and FPGA/FPIC routing. We present a graph-theoretic su cient condition for the analysis problem. The implications of the condition are: (1) there exist several classes of e cient approximation algorithms for the analysis problem; (2) there exist several classes of switch-module architectures on which the analysis problem can be solved e ciently.

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تاریخ انتشار 1997